(1) Field of the Invention
The present invention relates to solid-state imaging devices used for digital cameras and, in particular, to a technique employed for a Metal-Oxide-Semiconductor (MOS) solid-state imaging device in order to achieve high-speed reading and image noise reduction.
(2) Description of the Related Art
A typical MOS solid-state imaging device operates as follows; causing a line memory to hold pixel signals in parallel for each row in a horizontal blanking interval, sequentially reading the pixel signals from the line memory in a horizontal readout period following the horizontal blanking interval, and providing the read pixel signals outside. In order to read the pixel signals for a single frame, the MOS solid-state imaging device needs to repeat the above sequence for each of the rows included in the frame.
MOS solid-state imaging devices are finding wider applications today in various fields. One of such promising fields is an ultra high-speed camera which obtains an image at a frame rate significantly higher than that of an ordinary video camera. In order to increase the frame rate, a time period for reading the pixel signals needs to be decreased. Thus Patent Reference 1 (Japanese Unexamined Patent Application Publication No. 2006-93816 (FIG. 1)) proposes a solid-state imaging device which includes first and second row memories. During the horizontal readout period, the solid-state imaging device (i) reads pixel signals found in a first row, and (ii) causes the second line memory to hold pixel signals found in the second row. The above features allow the solid-state imaging device to cause the second line memory to start reading the pixel signals found in the second row as soon as the pixel signals found in the first row are read. This operation contributes to a shorter reading period of the pixel signals, decreasing the period by the horizontal blanking interval.